Jumat, 19 November 2010

[P487.Ebook] PDF Ebook Low Power Methodology Manual: For System-on-Chip Design (Integrated Circuits and Systems), by David Flynn, Robert Aitken, Alan Gibbons, Ka

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Low Power Methodology Manual: For System-on-Chip Design (Integrated Circuits and Systems), by David Flynn, Robert Aitken, Alan Gibbons, Ka

Low Power Methodology Manual: For System-on-Chip Design (Integrated Circuits and Systems), by David Flynn, Robert Aitken, Alan Gibbons, Ka



Low Power Methodology Manual: For System-on-Chip Design (Integrated Circuits and Systems), by David Flynn, Robert Aitken, Alan Gibbons, Ka

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Low Power Methodology Manual: For System-on-Chip Design (Integrated Circuits and Systems), by David Flynn, Robert Aitken, Alan Gibbons, Ka

This book provides a practical guide for engineers doing low power System-on-Chip (SoC) designs. It covers various aspects of low power design from architectural issues and design techniques to circuit design of power gating switches. In addition to providing a theoretical basis for these techniques, the book addresses the practical issues of implementing them in today's designs with today's tools.

  • Sales Rank: #1949323 in Books
  • Published on: 2007-07-31
  • Original language: English
  • Number of items: 1
  • Dimensions: 9.21" h x .75" w x 6.14" l, 1.41 pounds
  • Binding: Hardcover
  • 300 pages

From the Back Cover

"Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe [such] [a] low-power methodology with a practical, step-by-step approach."

�������������������������������������������������� Richard Goering, Software Editor, EE Times

"Excellent compendium of low-power techniques and guidelines with�balanced content spanning theory and practical implementation. The LPMM is�a very welcome addition to the field of low power SoC implementation that�has for many years operated in a largely ad-hoc fashion."

�������������������������������������������������� Sujeeth Joseph, Chief Architect - Semiconductor &
�������������������������������������������������� Systems Solutions Unit, Wipro Technologies

"The LPMM enables broader adoption of aggressive power management techniques� based �on extensive experience and silicon example with real data that every SOC designer can use to meet the difficulties faced in managing the power issues in deep submicron designs"

������������������������������������������������ Anil Mankar, Sr VP� Worldwide Core Engineering�
�������������������������������������������������and�Chief Development Officer, Conexant Systems Inc.

"Managing power, at 90nm and below, introduces significant challenges to design flow.� The LPMM is a timely and immediately useful book that shows how combination of tools, IP and methodology can be used together to address power management."

������������������������������������������������ Nick Salter, Head of Chip Integration, CSR plc.

ABOUT THE AUTHORS:

Michael Keating is a Synopsys Fellow in the company’s Advanced Technology Group, focusing on IP development methodology, hardware and software design quality and low power design.

David Flynn is an ARM R&D Fellow and has been with the company since 1991, specializing in low power System-on-Chip IP deployment and methodology.

Robert Aitken is an ARM R&D Fellow. His areas of responsibility include memory architecture, design for testability and design for manufacturability.

Alan Gibbons is a Principal Engineer at Synopsys, with a focus on development of advanced methodology and technology for ARM processor-based system design.

Kaijian Shi is a Principal Consultant in the Professional Services Group of Synopsys, specializing in low power design methodology and implementation.

About the Author

ABOUT THE AUTHORS:

Michael Keating is a Synopsys Fellow in the company’s Advanced Technology Group, focusing on IP development methodology, hardware and software design quality and low power design.

David Flynn is an ARM R&D Fellow and has been with the company since 1991, specializing in low power System-on-Chip IP deployment and methodology.

Robert Aitken is an ARM R&D Fellow. His areas of responsibility include memory architecture, design for testability and design for manufacturability.

Alan Gibbons is a Principal Engineer at Synopsys, with a focus on development of advanced methodology and technology for ARM processor-based system design.

Kaijian Shi is a Principal Consultant in the Professional Services Group of Synopsys, specializing in low power design methodology and implementation.

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